How to create a Microblaze design to simulate low level Software Functions

Hi !

In this post we will create a Microblaze subsystem connected to our Custom IP in order to write and test in simulation the low level software functions that will be used in the future driver of our custom IP.

As this post is quite long, here are the main sections of this post for a quick jump :

• Step 1 : Creating the VIVADO Project
• Step 2 : Creating the Microblaze Subsystem
• Step 3 : Set the memory mapping of Microblaze Subsystem

Good to know :

A major thing here to understand is that software access to our custom IPs can be simulated !

Ok and how is that possible ?

It can be easilly done by using a Microblaze. A Microblaze is a HDL softcore processor so it can be simulated. As the processor can run its software from its local BRAM, which are HDL IP's, the only thing to do is to initialize the BRAM's content with the .elf file generated by the SDK tool.

This is only associated with Microblaze core and HDL IPs. For ARM cores, simulation possibilities are limited and in my point of view much more complex to use.

Step 1 : Creating the VIVADO Project

Stage 1

First thing to do is to create a VIVADO projet for your device.

Launch VIVADO.

Click the Create Project from the Quick Start links

This will open the New Project pop up window, click Next.

Stage 2

Then, provide the name of your project, here I used test_proj.

Provide the destination repository.

Select the Create project subdirectory if you want the tool to put your project in a sub directory with the name of your project. Otherwise it will be in the destination repository. This is usefull if you need to store other things in the destination repository, things will be sorted.

Finish with Next.

Stage 3

The next window of the wizzard is the project type, leave to RTL Project, click Next.

Stage 4

The next window of the wizzard is the add source, here nothing to add, so select Next.

Stage 5

The next window of the wizzard is the add constraint, as we will only do a simulation and not an implementation we have nothing to add, so select Next.

Stage 6

The next window of the wizzard is the part selection.

As we will only do a simulation and not an implementation you can select any device reference, here I will use the MiniZed board. Then select Next.

Stage 7

And last, the Project Summary, select Finish.

Step 2 : Creating the Microblaze Subsystem

Basically this is assembling IP's in a Block Design !

Stage 1

Let's create a Block Design file.

On the left side select IP INTEGRATOR then Create Block design.

Provide a name if you want, leave everything else to default values, which will let VIVADO handle the Block Design in the VIVADO's project structure.

Click Ok.

Stage 2

First thing to do to use our custom IP is to provide the path to the VIVADO project.

In PROJECT MANAGER launch the settings command.

Select IP, then Repository section.

Click on the add cross to select the IP's repository.

The tool will provide the list of identified IPs and Interfaces.

Click OK and OK.

Ok, VIVADO knows our IP.

Stage 3

Now, let's add the IP to our design.

In the Block Design diagram edition window on the right, click on the add symbol to add our IP.

This will open the IP search pop up.

Filter with the led word, our IP should show up !

Select the IP in the list and press enter to add the IP to the BD.

There it is !!

Stage 4

Now, let's add the MicroBlaze subsystem to our design.

Again, select the add symbol and search the word Microblaze.

There will be 3 matches, select the MicroBlaze one, press enter.

The Microblaze IP is now in the design, BUT, it has to be configured.

Instead of adding all the associated IPs (reset, BRAM, BRAM Controller, clocking, .....) the tool provides a magic function, the Run Block Automation.

Click on Run Block Automation to launch the associated wizzard.

In this window you'll find all nevessary parameters to configure the entire MicroBlaze subsystem.

Set Local Memory to 64KB, in order to have enougth memory for software developement.

Set Debug Module to none because we won't do any debug.

Set Clock Connexion to External Port, no need for a clock buffer for simulation.

Finish with Ok.

Stage 5

The tool will populate the Block Design with the elements of the MicroBlaze subsystem.

As the IPs still have unconnected resources the tool will provide you with another proposition of Connection Automation !!

If you launch the Automation wizzard, you'll see that it will try to connect the AXI interface of our IP and the MMCM reset input.

For the AXI interface leave everything as proposed.

For the Reset, click on ext_reset_in to set its parameters. Use an ACTIVE_HIGH configuration and select Ok to finish.

Here is the generated result.

To finalize the Block Design we have to add the LED output.

Select the led_out pin, then CTRL+T, which adds an external connexion.

To get a clean view of the final design click the Regenerate Layout button.

Step 3 : Set the memory mapping of Microblaze Subsystem

The Block Design provides automatically the memory mapping !

Stage 1

Just select the Address Editor tab in the Block Design.

So you can see :

- Our IP led_test_ip is mapped througth the S00_AXI_IN interface.
- The tool provided a range of 64K bytes from the base address x44A0_0000.
- You can also identify the memory mapping for the MicroBlaze's Instruction and data segments.

You can modify the base address and the size allocated to our IP !


This is it !!

The hardware for our MicroBlaze system is ready.

Post Conclusion

Now we have :

- Created a VIVADO Project
- Created the MicroBlaze Subsystem
- Set the memory mapping of the MicroBlaze Subsystem